Senior Design Verification Engineer

Muntinlupa, Metro Manila, Philippines
Full Time
Experienced

Job Summary:
The Senior Design Verification Engineer is responsible for block-level up to system-level design verification as well as leadership in a design verification project. Assist the Operations Head/Manager in resource planning and management for the successful service delivery to clients.

Key Responsibilities:

  • Verify digital designs from block-level up to system-level
  • May verify analog-mixed signal blocks that interface to digital blocks
  • Identify test cases and develop verification plans based on design specifications
  • Develop test benches and test bench components such as models, monitors and scoreboards
  • Perform test implementation, simulation and debugging
  • Design regression testing environments
  • Perform regression testing, coverage collection and analysis
  • Provide leadership to design verification projects
  • Client, tasks and project management
  • Coach junior design verification engineers
  • Collaborate with design team and other stakeholders to deliver on-time and high-quality design verification
  • Review output of junior members of the team to ensure quality of design verification
  • Develop and promote best practices for design verification

Key Qualifications

  • BS in Electrical Engineering, Electronics Engineering, Computer Engineering or Applied Physics. Master’s/PhD is a plus
  • With at least 5 years of digital or analog-mixed signal design verification work experience
  • Expert in all phases of design verification – verification plan creation, test bench creation, test suite implementation, simulation & debugging, coverage collection & analysis, and regression testing
  • Experience in analog-mixed signal verification is preferred
  • Knowledge in industry standard protocols such as AXI, AHB, PCIe, and I2C
  • Proficient in one or more technology domains such as sensors, video & image processing, security and SoC infrastructure (memory, I/O, bus controllers)
  • Expert in using simulation tools such as VCS, Incisive/Xcelium, and Questa
  • Expert in HVL and methodologies (Verilog, SystemVerilog, UVM)
  • Proficient in C/C++ or other high-level programming language
  • Proficient in scripting such as Perl, shell scripting and Tcl
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